RISCV-EIRB

By Maxime Letemple

My biggest project during my S8 was the implementation of a RV32I RISCV processor on a Nexys A7 FPGA board. I was in a team of six students, and my job was to create test binaries in order to validate each instruction. When the processor was done, I had to set the gcc toolchain to work on our processor.

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The code can be found on the github repository.